qubitsok.com
Cut Noise. Work Quantum.
Americas, United States, Brooklyn Park
•
Posted 10 days ago
🏢 Quantinuum
Role Type
Role Focus
Seniority
Employer Type
Visa / Relocation Details
This role seeks a Sr. Advanced Semiconductor Packaging Engineer to develop innovative and reliable packaging solutions for the highly scaled ion traps used in the company's quantum computers, specifically the Apollo and Lumos systems. The engineer will collaborate closely with ASIC, ion trap, and optical designers, as well as external vendors, to prototype, design, and fabricate ion trap assemblies. This position requires immersion in a fast-paced, multi-functional team environment.
Key Responsibilities
Develop and implement advanced packaging concepts for tiling large assemblies of ion trap chips, electrical chips, and optical chips together.
Develop and implement advanced packaging concepts for mechanical, thermal, electrical, optical, and detection interfaces to next-generation ion traps.
Establish packaging strategies and processes for large-format ion trap chips requiring high I/O signal count and density.
Collaborate with vendors to implement and validate new packaging processes.
Support all stages of ion trap development to ensure compatibility with the packaging schemes.
Interface with the broader Quantinuum team to ensure ion trap packaging meets overall system requirements.
Engage with third parties to cultivate key partnerships, supplier relationships, and co-development opportunities.
Required Skills
Minimum Bachelor’s degree.
5+ years of experience in an engineering or R&D environment.
3+ years of experience in advanced semiconductor packaging development.
Nice-to-have Skills
PhD in Physics or Engineering.
7 years of experience with advanced large area multi-chip semiconductor packaging technologies.
5 years of experience with large heterogeneous integration and 2.5-3D packaging techniques.
5 years of experience with high-density I/O technologies.
Experience with photonic packaging and fiber-to-chip or optical chip to optical chip coupling.
Proven track record of innovation and IP development.
Experience working within a cross-functional team environment.
Technology Tags
The role is specifically focused on developing reliable packaging schemes for highly scaled ion traps.
The job requires extensive experience in advanced semiconductor packaging technologies and development.
The role explicitly requires experience with 2.5-3D packaging techniques for large heterogeneous integration.
A key responsibility is implementing advanced packaging concepts for tiling large assemblies of various chip types.
Experience with photonic packaging and optical chip coupling is highly valued for this role.
Expertise is needed for packaging electrical chips and handling high I/O signal count and density.
The engineer must develop packaging concepts integrating electrical, optical, and ion trap chips.